The present exemplary embodiments relate to the monitoring of defects in a semiconductor device and, more particularly relate to an arrangement wherein one semiconductor device can monitor the defects in an adjacent semiconductor device.
Latent defects are a class of semiconductor process defects that do not fail at time zero product testing, but either change state or cause fail in other structures over time. This defect class can be a strong contributor to Failure In Time (FIT) fails.
There does not currently exist a process to directly detect this latent defect class that does not incur excessive overhead in context of process cost as measured through cycle time or yield. Current best of breed methods attempt to screen these defects based on secondary characteristics such as excessive product leakage.